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European Journal of Applied Sciences – Vol. 9, No. 3
Publication Date: June 25, 2021
DOI:10.14738/aivp.93.10172.
Simpson, Z., Nguyen, L., Drewfs, N., & Mehta, G. (2021). An Interactive Design Framework to Explore Fault-Tolerant and Low-Energy
Reconfigurable Architectures. European Journal of Applied Sciences, 9(3). 77-93.
Services for Science and Education – United Kingdom
An Interactive Design Framework to Explore Fault-Tolerant and
Low-Energy Reconfigurable Architectures
Zachary Simpson
University of North Texas, Denton, TX, United States
Linh Nguyen
University of North Texas, Denton, TX, United States
Natalie Drewfs
University of North Texas, Denton, TX, United States
Gayatri Mehta
University of North Texas, Denton, TX, United States
ABSTRACT
Domain-specific customized reconfigurable architectures show great promise for
low energy applications as they can be tailored according to the suite of
applications. In order to design new optimized architectures, we need to be able to
consider and evaluate tradeoffs, and explore design choices efficiently. In this
paper, we present an interactive design framework to explore low energy and fault- tolerant reconfigurable architectures. This allows users to experiment their ideas,
try out-of-the-box strategies, and analyze their results visually. This can help
designers and researchers understand the bottlenecks and constraints of different
approaches in a better way. This can also help students learn digital design and
reconfigurable computing concepts in a fun and interactive way. The framework
has two gameplay modes – single player and community play. In single player
version, users can work on their individual levels where as community play allows
users to build upon other users’ solutions. The game offers in-depth tutorials over
the variety of gameplay elements as well as give users insight on how the game
elements relate to the critical design concerns of reconfigurable architectures, such
as, power, performance, area, and fault tolerance.
Keywords: Design framework, Reconfigurable Computing, Architecture exploration,
Custom reconfigurable architectures.
INTRODUCTION
Customized reconfigurable architectures have a great potential to create energy-efficient,
flexible designs for a specific domain of applications. There is a need for better tools that make
integrated circuit design fun and accessible for a broader community, and allow users to
explore a wide range of design choices, evaluate tradeoffs, run thorough comparison analysis,
and come up with architectural solutions that meet target design goals for a suite of
applications. Some of these design space exploration tools have already been developed, laying
groundwork for progress in this direction (e.g., [1], [2], [3], [4]). However, our current design
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framework is highly versatile that allows users to design and explore a variety of architectural
choices in an interactive manner. Users have access to a wide range of architectural choices and
benchmarks that they can use to conduct several case studies. They can experiment their
approach and see how their design decisions affect the overall architectural solution. Our
design framework is designed more like a gaming framework that can be used to teach
fundamentals of digital design, circuit design, reconfigurable computing, and integrated circuit
design in a fun and interactive way. It can be used in introductory classes to teach these
fundamentals and concepts. It can also be used by users without any science and engineering
background.
We present a design flow where users can work on problem instances, try out-of-the-box
techniques, experiment a variety of strategies, and see the experimental results visually. Users
can solve puzzles from scratch, or build upon partially solved instances from other users. The
framework provides a single-player competitive mode as well as community play mode. In our
previous work, we have demonstrated the power of human computation for coarse-grained
reconfigurable architectures (CGRA) mapping and leveraged insights from human game play to
develop new algorithms that outperform long term standards [5], [6], [7], [8], [9]. People use
their creativity, recognize patterns and exploit opportunities to tailor their approach to solve
design instances. Players also provide useful insights and feedback that would otherwise be
difficult to obtain from automated algorithms. In our framework, we also provide users
opportunity to provide any feedback related to problem instances, or the design environment.
The design environment takes advantage of the innate pattern recognition ability of humans
toward solving the fault tolerance and low energy problems. The game has been designed in
such a way that people of all ages and backgrounds can play. Players work in a game-like design
environment which is very easy to use with light training. By manipulating nodes and observing
score changes, our players learn intuitively how their choices move a design towards these
goals. We abstract away details such as the computations done by each element and flow of data
through the circuit with clean solid colored blocks and simple lines. We provide an abstraction
of the complexities of a chip architecture with a representation of connectivity between nodes.
A player observes legal connectivity patterns and comes to understand the implications of these
patterns through manipulating nodes and observing when connections become violations.
Each game mode offers a variety of levels in either Fault Tolerance or Low Energy challenges.
The objective of gameplay is to design either a fault-tolerant or a low energy solution that will
support a suite of applications. Players also untangle jumbled blocks to pack the puzzle into the
grid. Players accomplish this by playing in a dynamic work space environment where the
gameplay elements assist them toward finding a solution to the level. By changing the features
of the grid, players are making architectural design decisions. The gaming framework
represents various computational blocks, such as, Arithmetic and Logic Units (ALUs) and
dedicated multipliers, with different shapes in a connected graph. Different interconnect styles
are also represented in the various cell options in the grid. A scoring function was also
developed to help guide players toward feasible solutions.
The game offers in-depth tutorials over the variety of gameplay elements as well as give players
insight on how the game elements relate to the critical design concerns of reconfigurable
architectures, such as, power, performance, area, and fault tolerance. Players learn how to
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Simpson, Z., Nguyen, L., Drewfs, N., & Mehta, G. (2021). An Interactive Design Framework to Explore Fault-Tolerant and Low-Energy Reconfigurable
Architectures. European Journal of Applied Sciences, 9(3). 77-93.
URL: http://dx.doi.org/10.14738/aivp.93.10172
arrange nodes of the benchmark data flow graphs (DFGs) onto the architectures in a manner to
achieve the best score, which is related to low energy consumption. They can experiment their
ideas and strategies, and share their feedback with designers and researchers. Our framework
is versatile and can be easily extended to include more benchmarks, architectural choices, and
a suite of applications. In this paper, we present our design framework and its interface in detail,
and a design flow where users explore a variety of architectural choices in the design space.
The paper is organized in the following manner. Section 2 presents related research and
literature review. We present our design framework, its interface and features in detail in
Section 3. Our results are discussed in Section 4 and the concluding remarks are presented in
Section 5.
RELATED WORK
We have categorized our related work into several sections. We present research related to
coarse grained reconfigurable architectures, mapping algorithms, design space exploration,
and human computation.
Coarse-Grained Reconfigurable Architectures: There have been a number of surveys of
coarse-grained reconfigurable architectures (CGRAs) [13], [14], [15]. Stripe based designs such
as PipeRench [16], RaPiD [17] consist of one or more linear arrays of elements connected with
a full or partial crossbar interconnect between rows. In mesh architectures, computation units
are arranged in a two-dimensional array having horizontal and vertical interconnect and can
support nearest-neighbor, nearest-neighbor with hops, and hierarchical connections. Some of
the examples include [18], [19], [20], [21], [22].
Mapping Algorithms: A wealth of mapping algorithms have been developed over decades,
including some of our own design [6], [8]. The difficulty of the mapping problem has been well
discussed in the literature, including the following surveys [13], [14], [15]. Most nontrivial
formulations are NP-complete [23], and algorithmic approaches typically fall into one of several
styles. Categories include greedy algorithms [24], [25], [26], [27], randomized algorithms [28],
[15], [29], [17], [30], [31]. integer linear programming [32], [33], partitioning/clustering
algorithms [34], [33], [35], [36], and analytical placers[37], [38], [39], [40].
Architectural Space Exploration: Many researchers have worked on design space exploration
tools to explore architectural space such as fast, accurate simulators and high level languages
for architecture specification (e.g., [1], [2], [3]). This research is complementary to our own and
can contribute better design space exploration framework to explore design choices, compare
a variety of algorithms and architectures efficiently. Much research has been performed on
mapping data flow graphs to coarse grained architectures, and discussed in [41], [13], [14], [15]
surveys. In [42] and [43], researchers conducted several cross architectural studies, including
investigation of alternative interconnect topologies for mesh coarse-grained reconfigurable
arrays. Lambrechts and colleagues [44], [45] and Bouwens et al. [20], [46] tested several
architectural options for ADRES like CGRAs and performed further optimizations to this
architecture. Kim et al. [4] conducted a study in which an architectural search over
arrangements of components in nontraditional patterns was done to optimize design criteria.
Human Computation: Human computation plays a very important role in our interactive
design framework. In 1980s [47], [48], they discuss how computational tasks can be turned into
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entertaining activities. A rich collection of studies [49], [50], [51] and games with a purpose
[52], [53], [54] have been created over the years. In FoldIt [53], [54], players solve the instances
of 3D protein folding problems. The potential of human computation for Electronic Design
Automation (EDA) field is described in the research of DeOrio and Bertacco [55], [56]. They
mention how the 1980’s video game Pipe Dream (Pipe Mania [57]) resembles the problem of
routing, and the potential for encapsulating placement problem as a packing puzzle in the
manner of Tetris. DeOrio and Bertacco developed a visual game environment for solving
instances of the SAT problem [58]. In Plummings [59], players manipulate node clusters to
reduce critical path in FPGA placement. In our previous research, we have developed an
interactive mapping game [5], [11], [12], with the goal of learning about human mapping
strategies to develop efficient mapping algorithms, and an interactive framework to design and
explore low-energy domain-specific architectures [10]. In this paper, we present our
architecture design environment, UNTANGLEDIV (https://untangled4.unt.edu) that allows
exploration of low energy and fault-tolerant reconfigurable architectures in a fun and
interactive way. This framework can be used to teach digital design, reconfigurable computing
concepts, and the importance of critical design concerns of integrated circuits using a game- driven approach.
OUR INTERACTIVE DESIGN FRAMEWORK
In this section, we describe our interactive design framework that allows users to design and
explore a variety of architectural choices for low energy and fault-tolerant designs. The
framework can be played either in single player mode or community play. Single player mode
provides players an opportunity to work on their own puzzles or levels and check their
standings on the leaderboard. In community play mode, players can build upon other players’
solutions and solving puzzles in this mode makes it a community effort.
Figure 1. Main screen and level select screen in our design framework
The game provides in-depth tutorials to go over the goals and objectives of the game, and
gameplay features offered in the game interface for players to work with their puzzles. Puzzles
are arranged in the game in the level of complexity as shown in level select screen in Figure 1.
This allows users to have a smooth learning curve and have a better gameplay experience. All
the puzzles in the game are unlocked and users can select any of the puzzles to solve. Incentives
are provided throughout the gameplay in the form of bronze, silver, and gold stars. As players
progress through the puzzle, they keep accumulating stars depending on their performance.
The game also provides a leaderboard where players can check their standings in the game.
These incentives motivate players to perform well and keep improving their solutions.